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> Octal atm convergence phy, conexant# RS8228EBG
Octal atm convergence phy, conexant# RS8228EBG
This item includes the following: 1 pc. CONEXANT # RS8228EBG. Parts are New/unused and ready for use. As always, we will are willing to look at all Best offers!
Octal ATM Transmission Convergence PHY Device
The RS8228 Octal ATM Transmission Convergence PHY device dramatically
improves performance for switch and access system low-speed ports by integrating
all of the ATM physical layer processing functions found in the ATM Forum Cell Based
Transmission Convergence Sublayer specification (af-phy-0043.000) for eight individual
ports. Each port can be independently configured for operation at speeds
ranging from 64 kbps to 52 Mbps. There is also a powerdown mode option for each
TC port. A UTOPIA Level 2 Multi-PHY interface connects the device to the host switch
or terminal system and concentrates the ATM cell traffic onto one interface.
Typical system implementations center around the concentration of ATM cells
over standard PDH data rates such as T1/E1 lines, DS3 lines, and multiple Digital
Subscriber Line (DSL) formats such as HDSL, ADSL or VDSL*. For each format,
external devices perform the appropriate Physical Media Dependent (PMD) layer
functions and present the RS8228 with a payload bit stream. The RS8228 then performs
all cell-alignment functions on that bit stream. This gives system designers a
simple, modular, and low-cost architecture for supporting all UNI and NNI ATM interfaces
below 52 Mbps. Since the RS8228 performs only the cell-based portion of the
protocol stack, designers can select the most integrated framer and Line Interface
Unit (LIU) available or reuse existing devices and software.
The RS8228 can also be used in combination with a Rockwell Segmentation and
Reassembly (SAR) device. The RS8228 gluelessly connects to the SAR via the UTOPIA
and microprocessor interfaces. The device can be configured and controlled
optionally through a generic microprocessor interface. The RS8228 s chip-select feature
allows the microprocessor to select any of the framers through the PHY. The
RS8228 s eight interrupt inputs provide an internal mechanism for registering and
controlling generated interrupts.
* The term xDSL is used throughout this document to refer to the various DSL formats as a
Software reference material provided
8 chip selects for external framers
8 interrupt inputs for external framers
Octet- and bit-level cell delineation
